Analog-to-Digital Converter Testing

Optimal fast digital error correction method of pipelined analog to digital converter with DLMS algorithm

In this paper, convergence rate of digital error correction algorithm in correction of capacitor mismatch error and finite and nonlinear gain of Op-Amp has increased significantly by the use of DLMS, an evolutionary search algorithm. To this end, a 16-bit pipelined analog to digital converter was modeled. The obtained digital model is a FIR filter with 16 adjustable weights. To adjust weights o...

Designing an Integrated All-Optical Analog to Digital Converter

We present the procedure for designing a high speed and low power all-optical analog to digital converter (AO-ADC), by integrating InGaAsP semiconductor optical amplifier (SOA) with InP based photonic crystal (PhC) drop filters. The self-phase modulation in the SOA can shift the frequency of the Gaussian input pulse. The two output PhC based drop filters are designed to appropriately code the f...

System for Testing Analog-to-Digital Converters

This paper presents a system named ADC TEST that estimates the static and dynamic parameters of an analog-to-digital converter according to the definitions given in IEEE Standard 1241. One shows the available output graphical pages with theirs information and facilities in a practical testing application.

A BIST Structure for IP Multi-Slope A/D Converter Testing

This paper proposes a static test approach suitable for built-in-self-test (BIST) of Analog-to-digital converter Intellectual Property (IP). Static parameters (INL, DNL, gain, offset) are tested without using test equipment. The proposed BIST structure is applicable for testing models of analog-to-digital converters up to 12bits of resolution. Comparison results with dynamic test equipment vali...

Low-cost testing of high-precision analog-to-digital converters